As the development of high power electronics and electric devices towards high frequency, high power density, high reliability, and low cost gradually, inverter topologies widely applied in devices such as an uninterruptible power supply (UPS), an active power filter (APF) and a static var generator (SVG), become the hotspot of researching.
Currently, the widely used inverter topologies are, for example, T-type neutral point clamped (TNPC) topologies and diode neutral point clamped (DNPC) topologies, which exhibit different advantages in different applications. Since the TNPC topology has a relatively low loss in middle frequency bands, and has a relatively short commutation path during reactive power period, the TNPC topology is gradually applied in different electronics and electric devices.
Reliability is one of important indexes for evaluating the quality of electronics and electric devices, and the reliability of high power electronics and electric devices is especially important. Thereby, in order to improve the reliability of devices, different methods for detecting a straight-through short-circuit in a bridge arm of an inverter are proposed with respect to different inverter topologies.
The existing methods for detecting a straight-through short-circuit in a bridge arm of a TNPC inverter are mainly achieved by detecting a de-saturation of a voltage applied on a switch in the inverter, for example, with respect to an insulated gate bipolar transistor (IGBT) type switch, detecting whether a voltage Vce between a collector and an emitter thereof quits the saturation state. FIG. 1A is a schematic diagram illustrating a principle of detecting a de-saturation of a switch voltage Vce. For ease of explanation, An IGBT is taken as an example here, and the same as below.
As shown in FIG. 1A, the abscissa is the voltage Vce between the collector and the emitter of the switch, the ordinate is a current Ic of the collector of the switch, a plurality of solid curves are characteristic curves of the switch with respect to different gate voltages (i.e., a static driving voltage of the IGBT), the left and right sides of a dotted curve respectively illustrate a so-called saturation region and a linear region, and the same as below. When the switch (i.e., the IGBT) operates normally, its operating current (such as rated current) Inormal is relative small. For example, when the static driving voltage Vge of the IGBT is 15V, the switch operates at a point P1 on the characteristic curve corresponding to the static driving voltage Vge of 15V, which is in the saturation region. At this time, the voltage Vce between the collector and the emitter of the switch is relatively low, generally is 2˜3V.
When a straight-through short-circuit occurs in an inverter, a short current Isc flowing through a switch in the inverter is relative large, which is generally 4˜7 times of the rated current of the switch, i.e., Isc=(4˜7)×Inormal. For example, at this time, the switch operates at a point P2 on the characteristic curve corresponding to the static driving voltage Vge of 15V, which is in the linear region. At this time, the voltage Vce between the collector and the emitter of the switch is higher than that during the normal operation. The drift of an operating point of the switch from P1 to P2 is generally called as a de-saturation of the voltage Vce between the collector and the emitter of the switch, which is abbreviated as Vce de-saturation, and the same as below. In this way, whether a straight-through short-circuit occurs in the inverter can be determined by detecting the Vce de-saturation.
FIG. 1B is a schematic diagram illustrating a circuit for detecting a de-saturation of the switch voltage Vce in the related art. The connection relationships among individual elements comprised in the circuit for detecting the de-saturation of the switch voltage Vce in the related art are shown in FIG. 1B. When no straight-through occurs in the bridge arm, at which the switch S is located, of the inverter, a weak current of a current source Isource is discharged by a resistor R, a diode Da, a diode Db and a switch S which are connected in serial in turn, no relatively high voltage can be accumulated across the two terminals of a capacitor C, and thus a voltage on a positive terminal of the capacitor C, i.e., a point B, is not high enough to trigger a comparator (i.e., an operational amplifier) A. Here, a diode D which is anti-parallelly connected with the switch S does not participate in the detection.
When the voltage Vce between the collector and the emitter of the switch S satisfies: Vce is greater than a voltage obtained by subtracting a threshold voltage of the diode Da and a threshold voltage of the diode Db from 7V, i.e., is greater than about 5.6V (since the threshold voltage of the diode Da or Db is generally 0.7V, and a voltage drop on the resistor R may be ignored), the voltage on the positive terminal of the capacitor, i.e., point B, is increased for the capacitor C is constantly charged by the current source Isource, and when the voltage on the point B is greater than 7V, the comparator A is inverted and an output terminal O thereof outputs a high level, thereby, whether a straight-through occurs in the bridge arm, at which the switch S is located, of the inverter may be detected. Here, the signs “+” and “−” on the two sides of the switch S represent that the voltage at this time is up positive and down negative.
The existing methods for detecting a straight-through in a bridge arm or short-circuit in a TNPC inverter described with reference to FIGS. 1A and 1B are used in inverter circuits of various existing TNPC topologies. For example, FIG. 1C is a schematic diagram illustrating an inverter circuit of a TNPC topology, FIG. 1D is a schematic diagram illustrating an inverter circuit of another TNPC topology, FIG. 1E is a schematic diagram illustrating an inverter circuit of further another TNPC topology, and FIG. 1F is a schematic diagram illustrating an inverter circuit of still another TNPC topology. The connection relationships among individual elements comprised in the inverter circuits of the TNPC topologies are shown in FIGS. 1C, 1D, 1E and 1F. Direct voltage sources V1 and V2 connected in series in the same direction constitute a DV source, the signs “+” and “−” respectively represent a positive DV terminal and a negative DV terminal of the DV; G is a grounding terminal, and is also a midpoint of the DV source; switches S1 and S2 connected in series in the same direction constitute an inverting bridge arm, The collector of the switch S1 is connected to the positive DV terminal, the emitter of the switch S2 is connected to the negative DV terminal, diodes D1 and D2, which are anti-parallelly connected with the switches S1 and S2 respectively, are used for free-wheel or commutation, a connection point Oac between the switches S1 and S2 is an AC (alternative current) terminal; a bi-directional switching bridge arm is connected between the midpoint G and an AC terminal Oac, the bi-directional switching bridge arm can be formed by two switches connected in reverse parallel (i.e. anti-parallelly) or in reverse series, so as to achieve the free-wheel or commutation on two directions. For example, in FIG. 1C, switches S3 and S4 are connected in reverse series and are respectively anti-parallelly connected with diodes D3 and D4; in FIG. 1D, switches S13 and S14 are connected in reverse series and are respectively anti-parallelly connected with diodes D13 and D14; in FIG. 1E, switches S23 and S24 are anti-parallelly connected and are correspondingly connected with diodes D23 and D24 in reverse series; and in FIG. 1F, the switches S33 and S34 are anti-parallelly connected and are correspondingly connected with diodes D33 and D34 in reverse series.
Taking the TNPC topology type shown in FIG. 1C as an example, FIG. 1G is a schematic diagram illustrating a block diagram of a device for detecting a straight-through in a bridge arm of a TNPC inverter in the related art. All the switches S1˜S4 shown in FIG. 1G as a whole are encapsulated in one plastic package, and the detection circuit achieves the detection by being connected to pins of the packaged TNPC module. In the conventional technology, in order to detect whether a short-circuit occurs in the TNPC module, at least four detection circuits X1, X2, X3 and X4 need to be constructed to correspond to the switches S1, S2, S3 and S4 comprised in the packaged TNPC module. The four detection circuits respectively detect the switches connected thereto. Therefore, for power supply devices equipped with such a TNPC module, detection circuits surrounding the packaged TNPC module will be relatively complex, and occupy a relatively large area of its circuit board. Furthermore, when there are too many detection circuits, the probability of false operation due to interruption by peripheral circuits tends to be increased.